課程資訊

SWITCHING CIRCUIT AND LOGIC DESIGN

97-1

EE2012

901 32300

01

Ceiba 課程網頁
http://ceiba.ntu.edu.tw/971logic

Ch 1 Introduction: Number Systems and Conversion
Ch 2 Boolean Algebra
Ch 2 Boolean Algebra
Ch 3 Boolean Algebra (cont’d)
Ch 4 Application of Boolean Algebra
Ch 5 Karnaugh Maps
Ch 7 Multi-Level Gate Circuits; NAND NOR Gates
Ch 8 Combinational Ckt Design (skip 8.1, 8.2)
Ch 9 Multiplexers Decoders and PLD (skip 9.7)
Verilog: Combinational Circuits (TA)
Ch 11 Latches and FF
Ch 12 Registers and Counters
Ch 13 Analysis of Clock Sequential Ckts
Ch 14 Derivation of State Graphs and Tables
( Skip examples 2 and 3 in Sec. 14.3)
Ch 15 Reduction of State Tables (15.1, 15.2)
Ch 16 Sequential Ckt Design (16.1 to 16.4)
Supplementary materials

Learn basic theory of switching circuit, basic logic design skills and how to aplly it.

Office Hours

Textbook: C. H. Roth, Jr., Fundamentals of Logic Design,
5th edition, Thomson, 2004.

(僅供參考)

 No. 項目 百分比 說明 1. 期中考 35% 2. 期末考 35% 3. 隨堂測驗 11% 4. 作業 17% 5. Participation 2%

 課程進度
 週次 日期 單元主題 第1週 Ch 1 Introduction: Number Systems and ConversionCh 2 Boolean Algebra 第2週 Ch 2 Boolean AlgebraCh 3 Boolean Algebra (cont’d) 第3週 Ch 4 Application of Boolean Algebra 第4週 Ch 5 Karnaugh Maps 第5週 Quiz 1 Ch 5 Karnaugh Maps 第6週 Ch 7 Multi-Level Gate Circuits; NAND NOR Gates 第7週 Ch 8 Combinational Ckt Design (skip 8.1, 8.2) 第8週 Ch 9 Multiplexers Decoders and PLD (skip 9.7) 第9週 11/13 review session (TA) 11/14 Midterm 第10週 Ch 11 Latches and FF Verilog: Combinational Circuits (TA) 第11週 Ch 11 Latches and FF Ch 12 Registers and Counters 第12週 Ch 12 Registers and Counters 第13週 Ch 13 Analysis of Clock Sequential Ckts 第14週 Ch 14 Derivation of State Graphs and Tables ( Skip examples 2 and 3 in Sec. 14.3) 第15週 Quiz 2 Ch 15 Reduction of State Tables (15.1, 15.2) 第16週 Ch 16 Sequential Ckt Design (16.1 to 16.4) 第17週 Supplementary materials