課程資訊
課程名稱
交換電路與邏輯設計
SWITCHING CIRCUIT AND LOGIC DESIGN 
開課學期
97-1 
授課對象
積體電路設計第二專長學程  
授課教師
簡韶逸 
課號
EE2012 
課程識別碼
901 32300 
班次
02 
學分
全/半年
半年 
必/選修
必修 
上課時間
星期四6(13:20~14:10)星期五7,8(14:20~16:20) 
上課地點
電二144電二144 
備註
本系優先
總人數上限:70人 
 
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課程概述

Contents:
1.Introduction Number Systems and Conversion
2.Boolean Algebra
3.Boolean Algebra(Continued)
4.Algebraic Simplification
5.Applications of Boolean Algebra
6.Karnaugh Maps
7.Quine-McCluskey Method
8.Multi-Level Gate Networks NAND and NOR Gates
9.Multiple-Output Networks Multiplexers, Decoders, Read-Only Memories, and Programmable Logic Arrays
10.Combinational Network Design
11.Flip-Flops
12.Counters and Similar Sequential Networks
13.Analysis of Clocked Sequential Networks
14.Derivation of State Graphs and Tables
15.Reduction of State Tables State Assignment
16.Sequential Network Design
17.Interactive Networks
18.MSI Integrated Circuits in Sequential Network Design
19.Sequential Network Design with Programmable Logic Devices ( PLDs )
20.Networks for Addition and Subtraction
21.Networks for Arithmetic Operations
22.State Machine Design with SM Charts
23.Analysis of Asynchronous Sequential Networks
24.Derivation and Reduction of Primitive Flow Tables
25.State Assignment and Realization of Flow Tables
26.Hazards
27.Asychronous Sequential Network Design

課程目標
Text Book: Charles H. Roth, Jr., `Fundamentals of Logic Design 
課程要求
 
預期每週課後學習時數
 
Office Hours
 
參考書目
 
指定閱讀
 
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(僅供參考)
   
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無資料