課程資訊
課程名稱
數位系統設計
DIGITAL SYSTEM DESIGN 
開課學期
93-2 
授課對象
電機資訊學院  電機工程學系  
授課教師
吳安宇 
課號
EE4041 
課程識別碼
901 43500 
班次
 
學分
全/半年
半年 
必/選修
選修 
上課時間
星期五5,6,7(12:20~15:10) 
上課地點
電二102 
備註
限本系所學生(含輔系、雙修生)
總人數上限:30人 
 
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課程概述

一. 內容: Digital system design plays an important role in implementing digital functions in modern system-on-chip (SOC) designs. In this course, we will focus on developing the design skills for undergraduate students so that they can be familiar with state-of-the-art digital front-end design skills and flow. This course covers 3 parts:
- Firstly, we will introduce the Hardware Description Language (HDL). The chosen HDL is Verilog. We will formally cover the HDL grammar, coding guideline, synthesis guideline, which conforms to modern cell-based synthesis flow and Reuse Manual Methodology (RMM).
- Secondly, we will ask students to design an advanced MIPS CPU. It is based on the knowledge of “Computer Organization and Design. The assignment covers (a) Instruction development, (b) HDL coding and simulation of major blocks such as Arithmetic Logic Unit (ALU) and Control Unit (CU), (c) Enhanced CPU design with Pipelining and Forwarding, (d) Integration of whole design.
- Thirdly, port the MIPS CPU design to FPGA board and perform emulation (optional).

Course Outline:
- HDL grammar, coding guideline, and synthesis guideline (8 weeks)
- MIPS CPU design and implementation (6 weeks)
- or 2D Graphics Engine design and implementation (6 weeks)
- Final presentation, discussion, and demo (3 weeks)

二. 教科書:
- “Advances Digital Design with the Verilog HDL,” by M. D. Ciletti, Prentice Hall, 2003.
- “Verilog HDL: A Guide to Digital Design and Synthesis,” 2nd ed., by Samir Palnitkar, SunSoft, 2003 (全華代理)
- “Computer organization & design: The hardware/software interface,” 2nd edition, by David A. Patterson and John L. Hennessy, Morgan Kaufmann, 1998.
- “Reuse Methodology Manual for System-On-A-Chip Designs,” 3rd Edition, by Michael Keating, Pierre Bricaud, Kluwer Academic Publishers, 2002.

三. 成績評量方式
1. Participation 2% (about four times).
2. One mid-terms 24%
3. Final Projects (demo and presentation) 36%
4. Computer Labs and Homework (about four labs and four homework) 38%

四. 預修課程
- Programming Language, Logic Design (basic)
- Computer Organization and Design (required),
- VLSI Design (optional)

五. URL: http://access.ee.ntu.edu.tw 

課程目標
 
課程要求
 
預期每週課後學習時數
 
Office Hours
 
參考書目
 
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(僅供參考)
   
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