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Course title |
Integrated Circuit Technology |
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Semester |
110-2 |
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Designated for |
COLLEGE OF ELECTRICAL ENGINEERING AND COMPUTER SCIENCE GRADUATE INSTITUTE OF BIOMEDICAL ELECTRONICS AND BIOINFORNATICS |
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Instructor |
CHAO-HSIN WU |
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Curriculum Number |
EE5114 |
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Curriculum Identity Number |
921 U7120 |
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Class |
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Credits |
3.0 |
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Full/Half
Yr. |
Half |
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Required/
Elective |
Elective |
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Time |
Monday 2,3,4(9:10~12:10) |
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Remarks |
The upper limit of the number of students: 140. |
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Ceiba Web Server |
http://ceiba.ntu.edu.tw/1102EE5114 |
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Course introduction video |
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Table of Core Capabilities and Curriculum Planning |
Association has not been established |
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Course Syllabus
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Please respect the intellectual property rights of others and do not copy any of the course information without permission
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Course Description |
本課程將介紹積體電路製程，涵遙s程各階段之基礎理論與技術、設備原理與應用，並著重製程整合與前瞻性元件製程發展之配合。內容以CMOS之矽製程為主軸，並包含各種不同元件之製程探討。
內容包含:
1. Introduction
2. Modern Electronic Device Technology
3. Crystal Growth, Wafer Fabrication and Basic Properties of Silicon Wafers
4. Semiconductor Manufacturing
5. Lithography
6. Thermal Oxidation
7. Diffusion
8. Ion Implantation
9. Thin Film Deposition
10. Etching
11. Back-end technology
12. Metallization and Chemical Mechanical Polishing
13. Process Integration and IC Processing Technology |
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Course Objective |
建立對積體電路製程之知識基礎，了解各製程步驟之特性、用途、限制，以及各步驟間相容或相斥之關係，探討製程整合之方法及考量因素，以用於先進元件與製程之研究發展，會訓練同學使用TCAD軟體，來模擬元件製程條件與特性，建立基礎半導體元件的知識。 |
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Course Requirement |
無，但建議具備基礎電子學與半導體之知識。
The grading criteria to be announced in class. |
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Student Workload (Expected weekly study hours before and/or after class) |
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Office Hours |
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Designated reading |
待補 |
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References |
Reference：
1. M. Quirk and J. Serda, “Semiconductor Manufacturing Technology,” Prentice
Hall
2. S. M. Sze, “Semiconductor Devices Physics and Technology,” Wiley
3. C. Y. Chang & S. M. Sze, “ULSI Technology,” McGraw-Hill
4. V. Zant, “Microchip Fabrication,” (5th ed.), McGraw-Hill
5. S.K. Ghandhi, “VLSI Fabrication Principles,” (2nd ed.), Wiley
6. S. Wolf, “Silicon Fabrication for the VLSI Era, Vol. 2 – Process
Integration,” Lattice |
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Grading |
- NTU recommends an upper limit of 20% for A+ grades. This is not a mandatory requirement. Instructors may adjust the percentage based on course requirements. Instructors teaching required courses are particularly encouraged to follow this guideline.
- NTU uses a letter grade system for assessment. The grade percentage ranges and the single-subject grade conversion table in the NATIONAL TAIWAN UNIVERSITY Regulations Governing Academic Grading are for reference only. Instructors may adjust the percentage ranges according to the grade definitions. For more information, see the Assessment for Learning Section.
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Week |
Date |
Topic |
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第1週 |
2/14 |
Introduction and Historical Perspective/積體電路介紹與歷史展望 |
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第2週 |
2/21 |
Modern CMOS Technology/現代化的CMOS技術 |
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第3週 |
2/28 |
228放假 |
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第4週 |
3/07 |
Crystal Growth, Wafer Fabrication and Basic Properties of Silicon Wafers/晶體成長、晶圓製造與矽晶圓的基本性質 |
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第5週 |
3/14 |
Semiconductor Manufacturing-Clean Rooms, Wafer Cleaning, and Gettering/半導體製作、無塵室、晶圓清洗、吸附 |
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第6週 |
3/21 |
Photolithography/微影 |
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第7週 |
3/28 |
Thermal Oxidation and Si/SiO2 Interface/熱氧化與 Si/SiO2 界面 |
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第8週 |
4/04 |
春假 |
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第9週 |
4/11 |
Dopant Diffusion/摻質擴散 |
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第10週 |
4/18 |
Quiz 1 (close book) |
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第11週 |
4/25 |
Ion Implantations/離子佈植 |
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第12週 |
5/02 |
Plasma Basics and Thin Film Deposition/電漿與薄膜沉積 |
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第13週 |
5/09 |
Etching/蝕刻 |
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第14週 |
5/16 |
Back-End Technology/後段技術 |
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第15週 |
5/23 |
Process Integration and IC Processing Technology/製程整合與IC製程技術 |
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第16週 |
5/30 |
Quiz 2 (Close Book) |
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第17週 |
6/06 |
Final Project |