課程名稱 |
低功率嵌入式系統設計 LOW POWER ENBEDDED SYSTEM DESIGN |
開課學期 |
97-1 |
授課對象 |
電機資訊學院 資訊網路與多媒體研究所 |
授課教師 |
楊佳玲 |
課號 |
CSIE5149 |
課程識別碼 |
922 U3770 |
班次 |
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學分 |
3 |
全/半年 |
半年 |
必/選修 |
選修 |
上課時間 |
星期二6,7,8(13:20~16:20) |
上課地點 |
資310 |
備註 |
總人數上限:30人 |
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課程簡介影片 |
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核心能力關聯 |
核心能力與課程規劃關聯圖 |
課程大綱
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課程概述 |
Course Outline:
Course Introduction
Basics of Power Consumption
Dynamic power vs. Leakage power
Architectural-level power modeling
Wattch Tool Set
Low-power processor design
Power gating, clock gating, DVS techniques
Lower-power cache architecture
Case Study – Andes processor
Low-power interconnection design
Bus encoding schemes
Energy-aware NOC (network-on-chip) design
System-wide power management
Dynamic power management (DPM) for peripherals
Low-power flash storage system
Thermal-aware architecture design
Thermal-aware architectural-level floorplanning
DTM (Dynamic Thermal Management)
Power/Thermal Issues in CMP
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課程目標 |
As technology continues to scale, power has the first-order design issue. This course covers the latest development at architectural-level and system-level power reduction techniques, including low-power processor design, low-power interconnection, dynamic power management, low-power flash storage, and power/thermal issues in CMP architecture. Students will acquire the skills of evaluating the power of alternative design choices in system design, and software optimization for energy efficiency.
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課程要求 |
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預期每週課後學習時數 |
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Office Hours |
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指定閱讀 |
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參考書目 |
Textbook & Reference Books:
Selective paper readings |
評量方式 (僅供參考) |
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